1. Field of the Invention
The present invention relates to a CCD image sensor including CCD shift registers, and more specifically to a structure for outputting at a high speed a transferred charge from a pair of CCD shift registers arranged on both sides of an array of linearly arranged photosensor cells, respectively.
2. Description of Related Art
CCD shift registers are now widely used in a image sensor, a delayed lines, etc. In particular, the image sensor has been contrived to assume a so called two-line type in which a CCD shift register to be arranged along one array of linearly arranged photosensors are divided into a pair of CCD shift registers arranged in parallel to and at both sides of the linearly arranged photosensor array, in order to elevate the operation speed (for example, U.S. Pat. No. 4,712,137).
One typical two-line type of image sensor of the prior art includes first and second arrays of linearly arranged photosensor cells formed in a semiconductor substrate of one conduction type and shielded from each other by a photo shield located between the two arrays of linearly arranged photosensor cells. At an outside of the first array of linearly arranged photosensor cells, a first transfer gate array is provided in parallel to the first array of linearly arranged photosensor cells. At an outside of the first transfer gate array, first and second CCD shift registers are arranged in parallel to each other and to the first transfer gate array, so that odd-numbered cells of the first linearly arranged photosensor array are read out through the first transfer gate array to the first CCD shift registers and even-numbered cells of the first linearly arranged photosensor array are read out through the first transfer gate array to the second CCD shift registers. Each of the first and second CCD shift registers has a serial output connected to an output buffer, so that an output of the two output buffers will be combined at an external. With this arrangement, signal charges stored in the first linearly arranged photosensor array can be read out at a high speed, since the signal charges stored in the first linearly arranged photosensor array are alternately distributed into the two CCD shift registers and then transferred through the two CCD shift registers. Accordingly, the read-out speed become a double of that obtained when only one CCD shift register is provided to one linearly arranged photosensor array.
Similarly, at an outside of the second array of linearly arranged photosensor cells, a second transfer gate array is provided in parallel to the second array of linearly arranged photosensor cells. At an outside of the second transfer gate array, third and fourth CCD shift registers are arranged in parallel to each other and to the second transfer gate array, so that odd-numbered cells of the second linearly arranged photosensor array are read out through the second transfer gate array to the third CCD shift registers and even-numbered cells of the second linearly arranged photosensor array are read out through the second transfer gate array to the fourth CCD shift registers. Each of the third and fourth CCD shift registers has an serial output connected to an output buffer.
In the above mentioned arrangement, the first linearly arranged photosensor array and the second linearly arranged photosensor array are staggered by a half bit or a half of photosensor cell. Therefore, if the two linearly arranged photosensor arrays are read out in the order of a first cell of the first linearly arranged photosensor array, a first cell of the second linearly arranged photosensor array, a second cell of the first linearly arranged photosensor array, a second cell of the second linearly arranged photosensor array, . . . , and if the outputs of the two linearly arranged photosensor arrays are combined to one output, a considerably high degree of resolution of image can be read out at a high speed.
In the above mentioned high-speed high-resolution image sensor, in order to transfer the signal charge to an outside CCD shift register of the first and second CCD shift registers and an outside shift register of the third and fourth CCD shift registers, the signal charges must be passed through an inside CCD shift register of each pair of CCD shift registers. When the signal charges are passed through the inside CCD shift register, a portion of the signal charges remains in the inside CCD shift register, and therefore, the transfer efficiency lowers. In addition, the remaining signal charge is mixed into the signal charge to be transferred in the inside CCD shift register.